cystech electronics corp. spec. no. : c739e3 issued date : 2009.10.19 revised date : 2010.10.18 page no. : 1/6 mttn6515e3 cystek product specification n -channel logic level enha ncement mode power mosfet MTN6515E3 bv dss 150v i d 20a r dson(max) 65m features ? low gate charge ? simple drive requirement ? pb-free lead plating equivalent circuit outline MTN6515E3 to-220 g d s g gate d drain s source absolute maximum ratings (t c =25 c, unless otherwise noted) parameter symbol limits unit drain-source voltage v ds 150 gate-source voltage v gs 16 v continuous drain current @ t c =25 c i d 20 continuous drain current @ t c =100 c i d 15 pulsed drain current *1 i dm 80 avalanche current i as 20 a avalanche energy @ l=0.1mh, i d =10a, r g =25 e as 5 repetitive avalanche energy @ l=0.05mh *2 e ar 2.5 mj total power dissipation @t c =25 110 p d w total power dissipation @t c =100 55 operating junction and storage temp erature range tj, tstg -55~+175 c note : *1. pulse width limited by maximum junction temperature *2. duty cycle 1%
cystech electronics corp. spec. no. : c739e3 issued date : 2009.10.19 revised date : 2010.10.18 page no. : 2/6 mttn6515e3 cystek product specification thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 1.36 c/w thermal resistance, junction-to-ambient, max r th,j-a 62.5 c/w characteristics (tc=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 150 - - v v gs =0v, i d =250 a v gs(th) 0.45 0.75 1.20 v v ds =v gs , i d =250 a i gss - - 100 na v gs = 12, v ds =0 - - 1 v ds =120v, v gs =0 i dss - - 25 a v ds =100v, v gs =0, t j =125 c i d(on) *1 20 - - a v ds =10v, v gs =10v - 40 55 v gs =10v, i d =15a - 50 65 v gs =5v, i d =10a r ds(on) *1 - 60 75 m v gs =3v, i d =3a g fs *1 - 25 - s v ds =5v, i d =10a dynamic qg *1, 2 - 107 - qgs *1, 2 - 18 - qgd *1, 2 - 60 - nc i d =10a, v ds =80v, v gs =5v t d(on) *1, 2 - 20 - tr *1, 2 - 115 - t d(off) *1, 2 - 330 - t f *1, 2 - 380 - ns v ds =75v, i d =1a, v gs =4.5v, r g =6 ciss - 7660 - coss - 725 - crss - 420 - pf v gs =0v, v ds =25v, f=1mhz source-drain diode i s *1 - - 20 i sm *3 - - 80 a v sd *1 - - 1.3 v i f =i s , v gs =0v trr - 60 - ns qrr - 130 - nc i f =20a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. ordering information device package shipping marking MTN6515E3 to-220 (pb-free lead plating package) 50 pcs/tube, 20 tubes/box, 4 boxes / carton n6515
cystech electronics corp. spec. no. : c739e3 issued date : 2009.10.19 revised date : 2010.10.18 page no. : 3/6 mttn6515e3 cystek product specification typical characteristics v - dr ai n sour ce volt age( v ) i - drain current( a ) 0 0 d 16 ds 12 5.0v v = 10v 32 48 gs 345 on-region charact erist ics 80 64 3.0v 1.6 0.8 0 1.2 1.0 1.4 16 32 1.8 2.0 48 64 5.0 v 10 v gs v = 3.0 v 80 on-resist ance variat ion wit h drain current and gate voltage r -normalized drain-source on-resistance ds(on) i - drain current( a ) d on-resistance variation with temperature r - normalized drain-source on-resistance ds(on) t - junct i o n temper at ur e ( c) 0.4 -50 0.7 1.0 0 j -25 25 d i = 10a 1.3 1.6 1.9 gs 125 50 75 100 150 v = 5v on-resistance variation wit h gate-source voltage v - gat e-sour ce volt age( v ) 0.010 2 ds(on) 0.020 0.040 0.030 gs 4 6 0.080 0.060 0.050 0.070 0.090 81 0 d r - on-resist ance( ) i = 5 a t = 125 c a a t = 25 c q - gat e char ge( nc ) v - gat e sour ce vol t age( v ) gs 0 0 2 4 g 50 100 i = 10a 6 8 10 d 150 200 80v v = 50v ds gat e char ge charact er ist ics v - drain-source voltage( v ) capacitance( pf ) 6000 0 0 3000 ds 10 9000 12000 ci ss 20 30 40 gs f = 1mhz v = 0 v capacitance characteristics cr ss co ss
cystech electronics corp. spec. no. : c739e3 issued date : 2009.10.19 revised date : 2010.10.18 page no. : 4/6 mttn6515e3 cystek product specification typical characteristics(cont.) body diode forward voltage variation with source current and temperature 25 c t = 125 c v - body diode forward voltage(v) is - reverse drain current(a) 0.001 0 0.01 0.1 0.4 sd 0.2 0.6 v = 0v 1 10 100 a gs 1.0 0.8 1.2 -55 c 1.4
cystech electronics corp. spec. no. : c739e3 issued date : 2009.10.19 revised date : 2010.10.18 page no. : 5/6 mttn6515e3 cystek product specification recommended wave soldering condition soldering time product peak temperature pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c739e3 issued date : 2009.10.19 revised date : 2010.10.18 page no. : 6/6 mttn6515e3 cystek product specification to-220 dimension *: typical inches millimeters a b e g i k m o p 3 2 1 c n h d 4 style: pin 1.gate 2.drain 3.source 4.drain 3-lead to-220 plastic package cystek package code: e3 marking: n6515 1 2 3 device name date code inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.2441 0.2598 6.20 6.60 i - * 0.1508 - * 3.83 b 0.3386 0.3543 8.60 9.00 k 0.0299 0.0394 0.76 1.00 c 0.1732 0.1890 4.40 4.80 m 0.0461 0.0579 1.17 1.47 d 0.0492 0.0571 1.25 1.45 n - * 0.1000 - * 2.54 e 0.0142 0.0197 0.36 0.50 o 0.5217 0.5610 13.25 14.25 g 0.3858 0.4094 9.80 10.40 p 0.5787 0.6024 14.70 15.30 h - * 0.6398 - * 16.25 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: kfc ; pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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